/* Combination Lock using CCL

   David Johnson-Davies - www.technoblogy.com - 30th November 2020
   AVR128DA28 @ 24 MHz (internal oscillator)

   CC BY 4.0
   Licensed under a Creative Commons Attribution 4.0 International license:
   http://creativecommons.org/licenses/by/4.0/
*/

const int Key = 0b10010011;

void setup() {
  ADC0.CTRLA &= ~(ADC_ENABLE_bm);            // Silicon errata workaround
  
  // Configure I/O pins appropriately
  PORTA.PIN0CTRL = PORT_PULLUPEN_bm;                     // Pullup on PA0
  PORTA.PIN1CTRL = PORT_PULLUPEN_bm;                     // Pullup on PA1
  PORTC.PIN0CTRL = PORT_PULLUPEN_bm;                     // Pullup on PC0
  PORTC.PIN1CTRL = PORT_PULLUPEN_bm;                     // Pullup on PC1
  PORTD.PIN0CTRL = PORT_PULLUPEN_bm;                     // Pullup on PD0
  PORTD.PIN1CTRL = PORT_PULLUPEN_bm;                     // Pullup on PD1
  PORTF.PIN0CTRL = PORT_PULLUPEN_bm;                     // Pullup on PF0
  PORTF.PIN1CTRL = PORT_PULLUPEN_bm;                     // Pullup on PF1

  // Set up Configurable Custom Logic
  CCL.LUT0CTRLB = CCL_INSEL0_IN0_gc | CCL_INSEL1_IN1_gc; // Inputs 0 and 1 from pins
  CCL.LUT0CTRLC = CCL_INSEL2_LINK_gc;                    // Input 2 from next LUT
  CCL.LUT1CTRLB = CCL_INSEL0_IN0_gc | CCL_INSEL1_IN1_gc; // Inputs 0 and 1 from pins
  CCL.LUT1CTRLC = CCL_INSEL2_LINK_gc;                    // Input 2 from next LUT
  CCL.LUT2CTRLB = CCL_INSEL0_IN0_gc | CCL_INSEL1_IN1_gc; // Inputs 0 and 1 from pins
  CCL.LUT2CTRLC = CCL_INSEL2_LINK_gc;                    // Input 2 from next LUT
  CCL.LUT3CTRLB = CCL_INSEL0_IN0_gc | CCL_INSEL1_IN1_gc; // Inputs 0 and 1 from pins
  CCL.LUT3CTRLC = CCL_INSEL2_MASK_gc;                    // Input 2 masked

  CCL.TRUTH0 = 1<<(0b100 | (Key & 0b11));                // Truth table for LUT0
  CCL.TRUTH1 = 1<<(0b100 | (Key>>2 & 0b11));             // Truth table for LUT1
  CCL.TRUTH2 = 1<<(0b100 | (Key>>4 & 0b11));             // Truth table for LUT2 
  CCL.TRUTH3 = 1<<(0b000 | (Key>>6 & 0b11));             // Truth table for LUT3
  
  CCL.LUT0CTRLA = CCL_ENABLE_bm | CCL_OUTEN_bm;          // LUT0 and output to pin
  CCL.LUT1CTRLA = CCL_ENABLE_bm;                         // LUT1
  CCL.LUT2CTRLA = CCL_ENABLE_bm;                         // LUT2
  CCL.LUT3CTRLA = CCL_ENABLE_bm;                         // LUT3
  CCL.CTRLA = CCL_ENABLE_bm | CCL_RUNSTDBY_bm;           // CCL, run in standby
}

void loop() {
}